AT25320AY6-10YH-1.8【PDF 10/26 页】IC EEPROM 32KBIT 20MHZ 8DFN

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Sheet目录312

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Table 3-3.

Bit

Bit 0 (RDY)

Bit 1 (WEN)

Bit 2 (BP0)

Bit 3 (BP1)

Read Status Register Bit Definition

Definition

Bit 0 = “0” (RDY) indicates the device is READY. Bit 0 = “1” indicates the write cycle

is in progress.

Bit 1= “0” indicates the device is not WRITE ENABLED. Bit 1 = “1” indicates the

device is write enabled.

See Table 3-4 on page 10 .

Bits 4–6 are “0”s when device is not in an internal write cycle.

Bit 7 (WPEN)

See Table 3-5 on page 11 .

Bits 0–7 are “1”s during an internal write cycle.

WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of

four levels of protection. The AT25080A/160A/320A/640A is divided into four array segments.

One-quarter, one-half, or all of the memory segments can be protected. Any of the data within

any selected segment will therefore be read only. The block write protection levels and corre-

sponding status register control bits are shown in Table 3-4 .

The three bits BP0, BP1, and WPEN are nonvolatile cells that have the same properties and

functions as the regular memory cells (e.g., WREN, t WC , RDSR).

Table 3-4.

Block Write Protect Bits

Status

Array Addresses Protected

Level

1(1/4)

2(1/2)

3(All)

BP1

BP0

AT25080A

None

0300

? 03FF

0200

? 03FF

0000

? 03FF

AT25160A

None

0600

? 07FF

0400

? 07FF

0000

? 07FF

AT25320A

None

0C00

? 0FFF

0800

? 0FFF

0000

? 0FFF

AT25640A

None

1800

? 1FFF

1000

? 1FFF

0000

? 1FFF

The WRSR instruction also allows the user to enable or disable the write protect (WP) pin

through the use of the Write Protect Enable (WPEN) bit. Hardware write protection is enabled

when the WP pin is low and the WPEN bit is “1”. Hardware write protection is disabled when

either the WP pin is high or the WPEN bit is “0”. When the device is hardware write protected,

writes to the status register, including the block protect bits and the WPEN bit, and the block-pro-

tected sections in the memory array are disabled. Writes are only allowed to sections of the

memory that are not block-protected.

NOTE: When the WPEN bit is hardware write protected, it cannot be changed back to “0” as

long as the WP pin is held low.

AT25080A/160A/320A/640A

3347L–SEEPR–06/07

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